> On the other hand, newer AMD Epyc processors can (depending on the motherboard) use only 48 lanes to talk to the other socket, freeing another 16 lanes per socket (for a total of 160 PCIe lanes) at the cost of slower inter-socket communication; and they also have an extra single PCIe lane per socket to be used to connect to a BMC.
For people that aren't reading the whole article, I want to make it clear that "slower" is only relative to other newer chips. The lanes on the old chips were half as fast, so even 48 lanes beats them by a factor of 1.5x.
For people that aren't reading the whole article, I want to make it clear that "slower" is only relative to other newer chips. The lanes on the old chips were half as fast, so even 48 lanes beats them by a factor of 1.5x.