> Also further down the author states "while FP registers have to be wider to handle vector execution"
> Again I'm pretty certain FP registers are larger owing to the greater precision they have, not specifically because they're designed for vector ops... please somebody explain why my understanding is wrong?
ARM Neon is both 128bit SIMD and the FPU for the system. There's not a separate FPU from the SIMD.
> Again I'm pretty certain FP registers are larger owing to the greater precision they have, not specifically because they're designed for vector ops... please somebody explain why my understanding is wrong?
ARM Neon is both 128bit SIMD and the FPU for the system. There's not a separate FPU from the SIMD.